Pengantar Organisasi Komputer

Organisasi Sistem Komputer
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Organisasi Sistem Komputer
Application (Netscape)
Software
Hardware
Operating
Compiler
System
Assembler (Windows 98)
Processor Memory I/O system
10230
Instruction Set
Architecture
Datapath & Control
Digital Design
Circuit Design
transistors
° Koordinasi dari berbagai tingkat “abstraksi”
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Abstraksi Sistem Komputer
3
Konsep Abstraksi
° Memudahkan bermacam “pengguna” memahami
sistem komputer sesuai tingkat kebutuhannya
(yang berbeda-beda):
• end-user:
- menggunakan aplikasi untuk menyelesaikan tugasnya
- butuh aplikasi yang merepresentasikan alat bantu
penyelesaian tugasnya
• pemrogram aplikasi:
- menggunakan development tools untuk membuat program
aplikasi
- butuh model sistem komputer tanpa bergantung pada jenis
komputer secara spesifik
• pemrogram sistem:
- membuat program sistem
- butuh model sistem komputer tanpa bergantung pada
implementasi komponen-komponen perangkat keras
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Tingkat-tingkat Abstraksi Sistem Komputer
° Application S/W
• MS Word  computer as electronic type-writer
• MS Excel  computer as electronic calculator
° System S/W
• Compilers  computer as translator (source to executable program)
• Operating Systems  computer as machine that executes programs,
stores files, prints content of files to printers, communicate with other
computers
° Instruction Set
• What basic operations can be carried out
• What, where, and how data can be stored & retrieved in/from
memory
• How can data be exchanged to the outside “world”
° Computer H/W
• The 5 components: Datapath, Control, Memory, Input, Output
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Bahasa Pemrograman
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Tingkat-tingkat Bahasa Pemrograman
A = 25;
B = 8;
High Level Language
Program (e.g., C)
Compiler
10230
Assembly Language
Program
Assembler
Machine Language
Program (80x86)
Machine Interpretation
0000
1010
1100
0101
1001
1111
0110
1000
C = A * B;
A
B
C
mov
mov
add
mov
1100
0101
1010
0000
dw 25
dw 8
resw 1
eax, [A]
ebx, [B]
eax, ebx
[C], eax
0110
1000
1111
1001
1010
0000
0101
1100
1111
1001
1000
0110
0101
1100
0000
1010
1000
0110
1001
1111
Control Signal
Specification
°
°
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Java: Interpreted Programming Language
Java Language
Program
Java Compiler
Byte Code
Interpreter (Java Virtual Machine)
+
Just In Time (JIT) Compiler
Machine Language
Program (80x86)
Machine Interpretation
Control Signal
Specification
°
°
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Java (.java)  Byte Code (.class)
(http://www.javacoffeebreak.com)
Deskripsi Byte Code:
• getstatic
get static field from class
• ldc
push item from runtime constant pool
• invokevirtual
invoke instance method
• return
return control to the caller
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Sejarah Komputer
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Generasi Komputer
° I: ’46 – ’57: UNIVAC 1103
• Bahasa Rakitan
• Vacuum Tube
• 40.000 instruksi/detik
° II: ’58 – ’64: IBM 7094
•
•
•
•
Bahasa Tingkat Tinggi (Fortran, Cobol), Kompilator
Transistor
I/O & Processor Parallelism
200.000 instruksi/detik
° III: ’65 – ’71: IBM System/360, DEC PDP-8
•
•
•
•
Sistem Operasi
Small- & Medium-scale Integrated Circuit (IC)
Cache & Virtual Memory, Microprogramming, Pipelining, Parallelism
1.000.000 instruksi/detik
° IV: ’72 – ’77: Apple IIe, IBM PC
• Large Scale Integrated Circuit (LSI)
• Microprocessor, PC
• 10.000.000 instruksi/detik
° IV: ’78 – …: 80286 – Pentium IV, MIPS, Sparc, PowerPC
• Very Large Scale Integrated Circuit (VLSI)
• 100.000.000 instruksi/detik
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Arsitektur Komputer
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Komponen-komponen Komputer
MONITOR: to output data
SPEAKER: to
output data
KEYBOARD: to
input command/data
“CPU”: to
process
command &
data
DISK: to
input/output
data
MOUSE: to input
command/data
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5 Komponen Utama Komputer
Devices
Keyboard,
Mouse
Input
Disk
Computer
Processor
(active)
Control
(“brain”)
Datapath
(“brawn”)
Memory
(passive)
(where
programs,
data
live when
running)
Output
(where
programs,
data
live when
not running)
Display,
Printer
“CPU”
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Processor
° Responsible of executing program stored in
memory
• read instructions & input data
• execute
• store results (output data)
° Control Unit (“otak”):
• interprete instruction
• control data transfer between registers
• define processsor’s ‘language’ complexity (e.g., RISC vs. CISC)
° Datapath (“otot”):
• ALU: Aritmetic & Logical Unit
• Exposed register
- Size of register determines processor smallest data unit
(i.e., 8-bit, 16-bit, 32-bit, 64-bit computers)
• Hidden register
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Memory
° Responsible of storing instructions/data
° Each unit of instruction/data is stored in a memory
cell, whose address is known to the processor
° Any memory cell can be accessed by a processor
randomly (RAM: random access memory)
° The amount of instruction/data accessed by a
processor may vary (1, 2, ..., n memory cells at a
time)
° To achieve trade-off between speed and cost,
memory is structured hierarchically  memory
hierarchy
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Input/Output (Device)
° Responsible of communicating with the outside (of
computer) world
° A device may serve as Input-only, Output-only, or
both (Input-Output) device
• Input-only: keyboard
• Output-only: monitor display
• Input-Output: floppy disk, hard disk
° Data translation may be needed when processor
exchanges data with an I/O device so humans can
understand them
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Interkoneksi Antar-komponen Komputer (1/2)
Gbr. 5. (a) Tampak belakang komputer. (b) Bagian dalam komputer (tampak samping).
*Diambil dari http://www.ui.ac.id/pdpt/ppkk/PengenalanKomputer.html
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Interkoneksi Antar-komponen Komputer (2/2)
Proc
Caches
Processor-Memory Bus
adapters
I/O Bus
Memory
Controllers
I/O Devices:
Disks
Displays
Keyboards
Networks
Interconnected by a BUS
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Tren Teknologi
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Tren Teknologi: Kapasitas Mikroprosesor
Pentium 4: 42 million
Pentium III: 9.5 million
100000000
Alpha 21264: 15 million
Pentium Pro: 5.5 million
PowerPC 620: 6.9 million
Alpha 21164: 9.3 million
Sparc Ultra: 5.2 million
10000000
Moore’s Law
Pentium
i80486
Transistors
1000000
i80386
i80286
100000
2X transistors/Chip
Every 1.5 years
i8086
10000
i8080
i4004
1000
1970
1975
1980
1985
Year
1990
1995
2000
Called
“Moore’s Law”
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Tren Teknologi: Kinerja Prosesor
900
800
700
600
500
400
300
200
100
0
DEC Alpha 21264/600
1.54X/yr
DEC Alpha 5/500
DEC
HP
Sun MIPSMIPSIBM
AXP/
9000/
-4/ M M/ RS/
500
750
260 2000 120 6000
DEC Alpha 5/300
DEC Alpha 4/266
IBM POWER 100
87 88 89 90 91 92 93 94 95 96 97
Processor performance increase/year, mistakenly
referred to as Moore’s Law (transistors/chip)
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Tren Teknologi: Kapasitas Memori (1 Chip DRAM)
year
1980
1983
1986
1989
1992
1996
2000
size
1000000000
100000000
Bits
10000000
1000000
size(Megabit)
0.0625
0.25
1
4
16
64
256
100000
10000
1000
1970
1975
1980
1985
Year
1990
1995
2000
Now 1.4X/yr, or
doubling every 2 years
4000X since 1980
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Tren Teknologi: Kapasitas Disk
Year
Areal Density
1.7
1979
7.7
1989
63
1997
3090
2000
17100
100000
10000
1000
Areal Density
1973
100
10
1
1970
1980
1990
2000
Year
• Areal Density = BPI x TPI
- BPI: Bit Per Inch
- TPI: Tracks Per Inch
• Change slope 30%/yr to 60%/yr about 1991
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Teknologi Komputer  Perubahan Dramatis
° Prosessor
• 2X lebih cepat setiap 1,5 tahun
• 100X lebih cepat dalam dekade terakhir
° Memori
• Kapasitas DRAM: 2x / 2 years
• Kecepatan Memori: meningkat 10% per tahun
• Biaya per bit: membaik 25% per tahun
• Kapasitas meningkat 64X dalam dekade terakhir
° Disk
• Kapasitas disk: > 2X setiap 1,0 tahun
• Biaya per bit: membaik 100% per tahun
• Kapasitas meningkat 120X dalam dekade terakhir
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Komputer Berkinerja Tinggi
(High Performance Computers)
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Intel Pentium Pro Quad
CPU
P-Pr o
module
256-KB
Interrupt
L2 $
controller
Bus interface
P-Pr o
module
P-Pr o
module
PCI
bridge
PCI bus
PCI
I/O
cards
PCI
bridge
PCI bus
P-Pr o bus (64-bit data, 36-bit address, 66 MHz)
Memory
controller
MIU
1-, 2-, or 4-w ay
interleaved
DRAM
• All coherence and
multiprocessing glue in
processor module
• Highly integrated, targeted at
high volume
• Low latency and bandwidth
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SUN Enterprise
P
$
P
$
$2
$2
CPU/mem
cards
Mem ctrl
Bus interf ace/sw itch
Gigaplane bus (256 data, 41 address, 83 MHz)
I/O cards
2 FiberChannel
SBUS
SBUS
SBUS
° Proc + mem card - I/O card
100bT, SCSI
Bus interf ace
• 16 cards of either type
• All memory accessed over bus, so symmetric
• Higher bandwidth, higher latency bus
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Cray T3E
External I/O
P
$
Mem
Mem
ctrl
and NI
XY
Sw itch
Z
• Scale up to 1024 processors, 480MB/s links
• Memory controller generates request message for non-local references
• No hardware mechanism for coherence
- SGI Origin etc. provide this
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Intel Paragon
i860
i860
L1 $
L1 $
Intel
Paragon
node
Memory bus (64-bit, 50 MHz)
Mem
ctrl
DMA
Driver
Sandia’ s Intel Paragon XP/S-based Super computer
2D grid netw ork
w ith processing node
attached to every sw itch
NI
4-w ay
interleaved
DRAM
8 bits,
175 MHz,
bidirectional
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IBM SP-2
° Made out of
essentially
complete RS6000
workstations
° Network interface
integrated in I/O
bus (bw limited
by I/O bus)
Pow er 2
CPU
IBM SP-2 node
L2 $
Memory bus
4-w ay
interleaved
DRAM
Memory
controller
MicroChannel bus
NIC
I/O
DMA
i860
NI
DRAM
General interconnection
netw ork f ormed fom
r
8-port sw itches
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Berkeley NOW
° 100 Sun Ultra2
workstations
° Inteligent
network
interface
• proc + mem
° Myrinet Network
• 160 MB/s per link
• 300 ns per hop
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Intel 80x86 Architecture
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Intel History: ISA evolved since 1978
° 8086: 16-bit, all internal registers 16 bits wide;
no general purpose registers; ‘78
° 8087: + 60 Fl. Pt. instructions, (Prof. Kahan)
adds 80-bit-wide stack, but no registers; ‘80
° 80286: adds elaborate protection model; ‘82
° 80386: 32-bit; converts 8 16-bit registers into
8 32-bit general purpose registers;
new addressing modes; adds paging; ‘85
° 80486, Pentium, Pentium II: + 4 instructions
° MMX: + 57 instructions for multimedia; ‘97
° Pentium III: +70 instructions for multimedia; ‘99
° Pentium 4: +144 instructions for multimedia; '00
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Arsitektur Intel P6 (Pentium Pro)
Control Unit
Data Path
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Contoh: Komputer Berbasis Pentium
Processor
Processor/Memory
Bus
Memory
PCI Bus
I/O
I/O Busses
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