abstrak - Repository Maranatha - Universitas Kristen Maranatha

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ABSTRAK
Penyederhanaan fungsi Boolean sering kali menggunakan aljabar Boolean
atau Karnaugh-Map, tetapi ada cara lain untuk menyederhanakan fungsi Boolean
tersebut menggunakan metoda grafik yang disebut OBDD (Ordered Binary
Decision Diagram). Buku ini membahas tentang perancangan perangkat lunak
untuk menyederhanakan fungsi Boolean dengan menggunakan OBDD.
Perancangan ini meliputi algoritma pembuatan struktur pohon, algoritma tabel
kebenaran, dan algoritma OBDD yang meliputi pertama menghilangkan terminal
vertex yang redundan, kedua menghilangkan non-terminal vertex yang redundan,
ketiga menghilangkan test yang redundan dan algoritma preorder untuk
menelusuri hasil akhir pada struktur pohon agar dapat mengeluarkan hasil
penyederhanaan fungsi Boolean. Semua algoritma ini ditulis dalam bahasa C.
Perangkat lunak berjalan dengan baik pada saat uji coba walaupun menghasilkan
beberapa penyelesaian fungsi Boolean karena penentuan prioritas dari
variabelnya. Pada kasus tertentu meskipun prioritas variabelnya diubah, dapat
menghasilkan fungsi Boolean yang sama.
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ABSTRACT
Simplification of Boolean function always using Boolean algebra or
Karnaugh-map, but there’s another way to simplify Boolean function with using
graph method which is call OBDD (Ordered Binary Decision Diagram).This book
is telling about design of software for simplify Boolean function with OBDD. This
design include about tree algorithm, truth table algorithm, and algorithm OBDD
that include first remove duplicate terminals, second remove duplicate nonterminals, third redundant test, and algorithm preorder that for to
track outcomes in a tree structure in order to issue the results of a Boolean
function simplification. All of algorithm written in C language. This software
runs well while testing although can give some output because effect from
prioritization variable. In some cases, even the side effect prioritization variable
are changed, it still has the same Boolean function.
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DAFTAR ISI
ABSTRAK............................. .................................................................................................. i
ABSTRACT............................ .................................................................................................ii
KATA PENGANTAR........................ ..................................................................................iii
DAFTAR ISI........................................................................................................................... v
DAFTAR GAMBAR....................... ...................................................................................viii
DAFTAR TABEL....................... .......................................................................................... xi
BAB I
PENDAHULUAN
1.1 Latar Belakang... ................................................................................................... 1
1.2 Identifikasi Masalah.............................................................................................. 2
1.3 Tujuan........... ........................................................................................................ 2
1.4 Pembatasan Masalah ............................................................................................. 2
1.5 Sistematika Penulisan ........................................................................................... 3
BAB II
LANDASAN TEORI
2.1
Perangkat Lunak ............................................................................................... 5
2.2
Logika Biner.... ................................................................................................. 6
2.3.
Macam-macam Gerbang Logika ..................................................................... 7
2.4.
Maxterm dan Minterm...... ................................................................................ 9
2.4.1 Sum of Minterm(Sum of Product / SOP).. ............................................... 10
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2.4.2 Product of Maxterm(Product of Sum / POS)........... .............................. 10
2.5 Pohon(Tree) 11
2.5.1 Istilah-istilah Dasar Pohon(Tree) ............................................................ 12
2.6 Pohon Biner(Binary tree). ................................................................................... 15
2.6.1 Pembentukan Pohon Biner ...................................................................... 16
2.6.2 Penelusuran Pada Pohon Biner ............................................................... 16
2.6.3 Penelusuran PreOrder ............................................................................. 18
2.7
Ordered Binary Decision Diagram (OBDD) ................................................ 19
2.7.1 Menghilangkan Terminal Vertex yang Redundan ................................ 21
2.7.2 Menghilangkan Non-terminal Vertex yang Redundan ......................... 22
2.7.3 Menghilangkan Test yang Redundan ..................................................... 23
2.8
Efek dari Perubahan Prioritas ........................................................................ 25
2.9
C++................. ................................................................................................ 25
BAB III
PERANCANGAN PERANGKAT LUNAK
3.1 Diagram Alir Perangkat Lunak ......................................................................... 27
3.2 Perancangan Perangkat Lunak ........................................................................... 28
3.2.1 Struktur Pohon OBDD.. ............................................................................ 28
3.2.2 Inisialisiasi Awal Pohon .. ....................................................................... 34
3.2.3 Tabel Kebenaran .. ................................................................................... 37
3.2.4 Menghilangkan Terminal Vertex yang Redundan .. .............................. 38
3.2.5 Menghilangkan Non-terminal Vertex yang Redundan .. ....................... 41
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3.2.6 Menghilangkan Test yang Redundan ..................................................... 44
3.2.7 Preorder.......... .......................................................................................... 45
BAB IV Hasil Uji Coba Perangkat Lunak
4.1 Tampilan Awal Perangkat Lunak ...................................................................... 47
4.1.1 Tampilan Jumlah Variabel......................................................................... 49
4.1.2 Tampilan Tentukan Prioritas.. .................................................................. 50
4.2 Percobaan 1 Variabel.. ........................................................................................ 50
4.3 Percobaan 2 Variabel.. ........................................................................................ 51
4.4 Percobaan 3 Variabel.. ........................................................................................ 56
4.5 Percobaan 4 Variabel.. ........................................................................................ 58
4.6 Perubahan Prioritas.. ........................................................................................... 61
4.7 Perbandingan Hasil Perhitungan Menggunakan OBDD dan Manual.. ............ 71
BAB V KESIMPULAN DAN SARAN
5.1 Kesimpulan........... .............................................................................................. 69
5.2 Saran.............. ...................................................................................................... 69
DAFTAR PUSTAKA
LAMPIRAN A
LAMPIRAN B
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DAFTAR GAMBAR
Gambar 2.1
Contoh Pohon (Tree) ...................................................................................... 11
Gambar 2.2
Contoh Bukan Pohon (Tree) .......................................................................... 12
Gambar 2.3
Anatomi Pohon ............................................................................................... 13
Gambar 2.4
Ilustrasi Bagian Simpul .................................................................................. 15
Gambar 2.5
Ilustrasi Pohon biner ....................................................................................... 16
Gambar 2.6
Penelusuran Preorder ..................................................................................... 19
Gambar 2.7 Sebuah Binary Decision Tree.......................................................................... 20
Gambar 2.8 Terminal Vertex yang Tidak Redundan Lagi ................................................. 22
Gambar 2.9 Non-terminal vertex yang tidak redundan lagi ............................................... 23
Gambar 2.10 Hasil Penyederhanaan ...................................................................................... 24
Gambar 2.11 Hasil Akhir Dengan Urutan C,B,A ................................................................. 25
Gambar 2.12 Logo Borland C++ 6 ........................................................................................ 26
Gambar 3.1 Diagram Alir Perangkat Lunak ....................................................................... 27
Gambar 3.2 Struktur Pohon OBDD ..................................................................................... 29
Gambar 3.3 Lokasi Struktur Pohon pada Array ................................................................. 30
Gambar 3.4 Ilustrasi Letak Posisi Pohon pada Array ........................................................ 30
Gambar 3.5 Ilustrasi Pembuatan Tabel Kebenaran dengan 4 variabel.............................. 38
Gambar 4.1 Tampilan Menu Utama Sebelum Dijalankan ................................................. 48
Gambar 4.2 Tampilan Menu Utama pada Saat Dijalankan ............................................... 49
Gambar 4.3 Tampilan Junlah Variabel................................................................................ 49
Gambar 4.4 Tampilan Tentukan Prioritas ........................................................................... 50
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Gambar 4.5 Tahap Awal (1 Variabel) ................................................................................. 51
Gambar 4.6 Menghilangkan Terminal Vertex yang Redundan (1 variabel) ..................... 52
Gambar 4.7 Menghilangkan Non-terminal Vertex yang Redundan (1 Variabel) ............. 52
Gambar 4.8 Menghilangkan Test yang redundan (1 Variabel) .......................................... 53
Gambar 4.9 Tahap Awal (2 Variabel) ................................................................................. 54
Gambar 4.10 Menghilangkan Terminal Vertex yang Redundan (2 Variabel) .................... 54
Gambar 4.11 Menghilangkan Non-terminal Vertex yang Redundan (2 Variabel) ............. 55
Gambar 4.12 Menghilangkan Test yang Redundan(2 Variabel) ......................................... 55
Gambar 4.13 Tahap Awal (3 Variabel) ................................................................................. 56
Gambar 4.14 Menghilangkan Terminal Vertex yang Redundan (3 Variabel) .................... 57
Gambar 4.15 Menghilangkan Non-terminal Vertex yang Redundan (3 Variabel) ............. 57
Gambar 4.16 Menghilangkan Test yang Redundan (3 Variabel) ........................................ 58
Gambar 4.17 Tahap Awal (4 Variabel) ................................................................................. 59
Gambar 4.18 Menghilangkan Terminal Vertex yang Redundan (4 Variabel) .................... 59
Gambar 4.19 Menghilangkan Non-terminal Vertex yang Redundan (4 Variabel) ............. 60
Gambar 4.20 Menghilangkan Test yang Redundan (4 Variabel) ........................................ 60
Gambar 4.21 Tahap Awal Perubahan Prioritas (3 Variabel) ............................................... 61
Gambar 4.22 Menghilangkan Terminal Vertex yang Redundan Perubahan
Prioritas(3 Variabel) ....................................................................................... 62
Gambar 4.23 Menghilangkan Non-terminal Vertex yang Redundan Perubahan
Prioritas (3 Variabel) ...................................................................................... 62
Gambar 4.24 Menghilangkan Test yang Redundan (3 Variabel) ........................................ 63
Gambar 4.25 Perubahan Prioritas x2x1x3 ............................................................................ 63
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Gambar 4.26 Perubahan Prioritas X2 X3 X1 ............................................................................ 64
Gambar 4.27 Perubahan Prioritas X3 X1 X2 ............................................................................ 65
Gambar 4.28 Perubahan Prioritas X3 X2 X1 ............................................................................ 65
Gambar 4.29 Tahap Awal ...................................................................................................... 66
Gambar 4.30 Menghilangkan Terminal Vertex yang Redundan ......................................... 67
Gambar 4.31 Menghilangkan Non-terminal Vertex yang Redundan .................................. 67
Gambar 4.32 Menghilangkan Test yang Redundan.............................................................. 68
Gambar 4.33 Tahap Awal ...................................................................................................... 69
Gambar 4.34 Menghilangkan Terminal Vertex yang Redundan ......................................... 69
Gambar 4.35 Menghilangkan Non-terminal Vertex yang Redundan .................................. 70
Gambar 4.36 Menghilangkan Test yang Redundan.............................................................. 70
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DAFTAR TABEL
Tabel 2.1 Simbol-simbol Gerbang Logika ........................................................................... 8
Tabel 2.2 Tabel Maxterm dan Minterm Dengan 3 Input Variabel ..................................... 9
Tabel 2.3 Tabel Kebenaran .................................................................................................. 20
Tabel 4.1 Hasil Perbandingan OBDD Dengan Manual...................................................... 71
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